Using highly developed recipes, Mir Enterprises offers deep silicon etching of high aspect ratio features (1:30+), whilst retaining good sidewall angels, for an array of MEMS technologies, including C-SOI platform. For each design, the recipe is fine tuned in order to obtain geometries for critical features as close to the nominal values as possible.

15th July 2021

Deep Reactive Ion Etching (DRIE) with High Aspect Ratios

Using highly developed recipes, Mir Enterprises offers deep silicon etching of high aspect ratio features (1:30+), whilst retaining good sidewall angels, for an array of MEMS technologies, including C-SOI platform. For each design, the recipe is fine tuned in order to obtain geometries for critical features as close to the […]
1st October 2020

MEMS Wafer Level Packaging (WLP)

Wafer Level Packaging of MEMS sensors enables high yield, high volume and facilitates device functionality where specific pressure or gases are required inside the sealed cavity. Mir Enterprises has years of experience in packaging of such MEMS devices (both for inertial sensors and micro-fluidic devices), using direct, anodic, thermocompression and […]
6th September 2020

Mir Enterprises will be attending the IEEE MEMS 2021 Online

Mir Enterprises will be attending the 34th IEEE Internation Conference on Micro Electro Mechanical Systems (25-29 January 2021). The event is one of the premier annual events reporting research results on all scientific aspects of Micro/Nanoscale Devices, Micro/Nanosystems, as well as their relevant technologies and industrial trends.
20th June 2020

Mir Enterprises operations continue as normal throughout the COVID pandemic.

We will continue to service our clients uninterrupted throughout the COVID pandemic period. We expect our lead-times to remain as normal during this period. For all your design and fabrication needs please get in touch with us via the “Contact Us” page.